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Google is hiring for Security RTL Design Engineer, Early career | Apply Now
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Role :Security RTL Design Engineer, Early career
Location :Bengaluru
Job Description
For the position of Security RTL Design Engineer, Early Career, Google is hiring!
Responsibilities
- Carry out Lint/CDC/FV/UPF checks, functional/performance simulation debugging, and Verilog/System Verilog RTL coding.
- Carry out functional/performance simulation debugging, Lint/CDC/FV/UPF checks, and Verilog/System Verilog RTL coding.
- Take part in coverage analysis and test planning.
- Create RTL implementations that satisfy objectives related to performance, area, and competitive power.
- Collaborate with multidisciplinary and multi-site teams in the fields of physical design, RTL design, architecture, verification, and DFT.
Education Qualifications
- a bachelor's degree in computer science or electrical engineering, or comparable work experience
Skills
- Knowledge of ASIC design processes and Q.A. processes (VCLP, Lint, CDC, RDC, SGDFT, etc.)
- familiarity with VCLP, Lint, CDC, RDC, SGDFT, and other ASIC design processes and quality assurance flows
- knowledge of creating RTL digital logic with tools like SystemVerilog for ASICs
- familiarity with a scripting language like Python or Perl
How to Apply
- Review Job Details: Read through all the job details on this page to understand the requirements and responsibilities.
- Click the Apply Link: Scroll down and click the “Apply Link” button to be redirected to the official website.
- Fill Out the Application: On the official website, fill out the application form with the provided information.
- Double-Check Your Information: Before submitting your application, review all the details you’ve provided to ensure accuracy and completeness.
- Submit Your Application: Once you’re satisfied with your application, submit it through the official website as instructed.
